1. Field of the Invention
The present invention relates to a control apparatus for a semiconductor power converter, and particularly, to a control apparatus for controlling the superposing of a DC component on an AC output from a semiconductor power converter employing fixed-pulse switching patterns.
2. Description of Related Art
A three- or single-phase semiconductor power converter conducts a switching operation that causes the asymmetrical magnetization of a transformer connected to the power converter. The asymmetrical magnetization of the transformer is also caused by an AC load, an AC system, and the like involving the power converter, to produce an asymmetrical magnetization overcurrent. For protection against the asymmetrical magnetization overcurrent, the power converter must be stopped. This results in stopping the supply of power to the load.
FIG. 1 is a view showing a principle of pulse width modulation (PWM) carried out in a standard three-phase semiconductor power converter. In FIG. 1, a triangular wave W1 is a carrier wave and a modulated wave W2 corresponds to a command value for an output voltage to be generated by the power converter. The waves W1 and W2 are compared with each other, to turn on/off semiconductor switching elements, so that the power converter may provide a voltage corresponding to the command value.
FIG. 2 is a view showing a principle of PWM carried out in a standard single-phase semiconductor power converter. In FIG. 2, a triangular wave W3 is a carrier wave and a modulated wave W4 corresponds to a command value for an output voltage to be generated by the power converter. The waves W3 and W4 are compared with each other, to turn on/off semiconductor switching elements, so that the power converter may provide a voltage corresponding to the command value.
The power converter of any one of FIGS. 1 and 2 is connected to a transformer to constitute a power system. The transformer causes core saturation. To prevent the core saturation, asymmetrical magnetization must be suppressed. For this, PWM of each of the three- and single-phase semiconductor power converters shown in FIGS. 1 and 2 employs a modulated wave W2+ (W4+) formed by superposing a DC component α on the modulated wave W2 (W4). Superposing a DC component on an AC output of a semiconductor power converter is effective to suppress the asymmetrical magnetization of a transformer connected to the power converter.
There is a semiconductor power converter that employs fixed-pulse switching patterns for PWM control. The PWM control employing fixed-pulse switching patterns is advantageous in reducing harmonics even if a gate pulse switching frequency is low. This method, however, is unable to change an AC amplitude, and therefore, is unable to superpose a DC component on an AC output, unlike the conventional PWM control that compares a carrier wave with a modulated wave to generate a gate pulse. There is, therefore, a need for developing a new asymmetrical magnetization suppressive control technique.
An example of the related art is disclosed in Japanese Unexamined Patent Application Publication No. 2003-274675. The publication discloses that, in the one-pulse single-phase bridge voltage type self-excitation converter as shown in its accompanying FIG. 1, a plurality of self-quenching type devices 1A, 1B, 1C, and 1D are subjected to bridge connection, an AC terminal is connected to a power system or a load 4, and at the same time a DC terminal is connected to a DC capacitor 3. It further discloses that the one-pulse single-phase bridge voltage type self-excitation converter has a pulse width calculation means 5 for calculating a desired pulse width according to the fundamental effective value of the AC output voltage being outputted to the AC terminal, and means 7, 8, 9, 10, 11, 28, and 29 for adding one portion of the pulse width of the AC output voltage to an output voltage phase, subtracting the remaining pulse width where one portion is subtracted from the phase of the AC output voltage, calculating a phase command value of each arm in the one-pulse single-phase bridge voltage type self-excitation converter, and generating the gate pattern of the self-quenching devices 1A, 1B, 1C, and 1D of each arm.